A NAND flash memory where memory cells are arranged three-dimensionally has been known. In such a stacked NAND flash memory, a memory film (charge storage film) similar to that of a memory cell part is formed in a select transistor part to reduce the process cost. Although it is desirable to use the same polycrystalline semiconductor layer as that of the memory cell part as a channel material, there is concern that the threshold voltage of a select transistor supposed to be constant is liable to vary under the influence of polycrystalline grains or grain-boundary levels.
In the case of a planar NAND flash memory where memory cells are arranged two-dimensionally, a single crystal semiconductor substrate is generally used as a channel material and a variation in the threshold voltage caused by the channel film quality is small. The threshold voltage can be adjusted by ion-injecting impurities into the channel part. However, in the case of a stacked memory, not only is the channel material a polycrystalline film, but also the channel film is thin. Therefore, the threshold voltage is difficult to adjust by injecting impurities for a similar reason that the threshold is generally difficult to adjust in an ultrathin-film SOI device.